Circuit and Interconnect Design for RF and High Bit-rate Applications

Realizing maximum performance from high bit-rate and RF circuits requires close attention to IC technology, circuit-to-circuit interconnections (i.e., the interconnect ) and circuit design. This detailed book covers each of these topics from theory to practice, with sufficient detail to help you produce circuits that are first-time right . Many practical circuit examples are included to demonstrate the interplay between technology, interconnect and circuit design.Realizing maximum performance from high bit-rate and RF circuits requires close attention to IC technology, circuit-to-circuit interconnections (i.e., the interconnect ) and circuit design. Circuit and Interconnect Design for RF and High Bit-rate Applications covers each of these topics from theory to practice, with sufficient detail to help you produce circuits that are first-time right . A thorough analysis of the interplay between on-chip circuits and interconnects is presented, including practical examples in high bit-rate and RF applications. Optimum interconnect geometries for the distribution of RF signals are described, together with simple models for standard interconnect geometries that capture characteristic impedance and propagation delay across a broad frequency range. The analyses also cover single-ended and differential geometries, so that the designer can incorporate the effects of interconnections as soon as estimated interconnect lengths are available. Application of interconnect design is illustrated using a 12.5 Gb/s crosspoint switch example taken from a volume production part.§From the technology perspective, transistor performance and its relationship to design targets for high bit-rate and RF applications is extensively discussed. Traditional figures of merit, such as fT and fmax and their relevance to circuit design are discussed, and new figures of merit are introduced that are shown to be highly valuable for broadband circuit and oscillator design. In addition, an analysis of transistor operation at supply voltages above breakdown voltage BVCEO, is presented.